Scan technology is essential for testing the digital content of large-volume devices. By using scan, you can make the device itself responsible for some of the “test” chores, and you can shorten the ...

Test compression sounds like magic. Read on to learn how this trick is done. Large, complex ICs are viable because their design meets test as well as functional requirements. Design for test (DFT) was ...

The trend in semiconductors leads to more IC test data volume, longer test times, and higher test costs. Embedded deterministic test (EDT) has continued to deliver more compression, which has been ...

The size of designs continues to grow and IC manufacturers are pushing for higher test quality, especially in mission-critical applications such as transportation and medicine. More advanced nodes ...

Semiconductor chips have been evolving to meet the demands of rapidly transforming applications, and so has the test technology to meet the test goals of those chips. Going back two decades or so, the ...

IC designers now have a powerful weapon in the struggle against rising test costs: commercially available EDA solutions that provide fast and effective means to implement scan compression on-chip. By ...

With more and more embedded systems being connected, sending state information from one machine to another has become more common. However, sending large packets of data around on the network can be ...