Design And Reuse

TES offers CAN Flexible Data-Rate Controller IP Core for System-on-Chip (SoC) Designs

TES Electronic Solutions GmbH adds to its IP portfolio a new VHDL-based CAN Flexible Data-Rate (FD) controller IP core. The IP is designed for System-on-Chip (SoC) implementations and can be ...
Design And Reuse

RISC-V and AI/ML redefining the future of Edge Computing

Easier multi-device coordination: RISC-V facilitates better coordination among multiple edge devices through its open ...
Design And Reuse

GUC’s HBM4E IP Honored with Best IP / Processor and Five-Year Achievement in EE Awards Asia 2025

GUC is pleased to announce that it’s industry-leading 3nm HBM4E IP has been honored with the Five-Year Achievement Award – Engineers’ Choice Best EDA & IP / Processor at the EE Awards Asia 2025, ...
Design And Reuse

Siemens unveils technologies to accelerate the industrial AI revolution at CES 2026

Siemens and NVIDIA expand their partnership to build the Industrial AI Operating System, reinventing the entire end-to-end industrial value chain through AI – from design and engineering to ...
Design And Reuse

CES 2026: Nordic Semiconductor simplifies edge AI for billions of IoT devices

AI factories train intelligence, but Nordic deploys it – on device, at the edge, where the world happens," said Vegard Wollan, CEO at Nordic Semiconductor. “Edge AI is no longer optional – it’s the ...
Design And Reuse

SK hynix Showcases Next-Generation AI Memory Innovations at CES 2026

Seoul -- SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it will open a customer exhibition booth at Venetian Expo and showcase its next-generation AI memory solutions at CES ...
Design And Reuse

Meta and Qualcomm push RISC-V market share towards 25%

Talk of RISC-V hitting 25% market penetration has been doing the rounds this week, with recent moves by Meta and Qualcomm often cited as evidence that the instruction set is moving beyond hobbyist ...
Design And Reuse

MIPS S8200 Delivers Software-First RISC-V NPU To Enable Physical AI at the Autonomous Edge

MIPS S8200 NPU is sampling now to lead customers developing autonomous edge transportation, robotics, and embedded platforms; ForwardEdge ASIC selects MIPS S8200 ...
Design And Reuse

AMD, NVIDIA and Others Reportedly to Debut New Chips at CES 2026, Spotlighting TSMC 3nm and 5nm

For CES 2026, this year’s show continues to center on the theme of “AI Everywhere,” with the spotlight returning to on-device AI PC applications. The report notes that amid rising memory costs, the ...
Design And Reuse

Tenstorrent Unveils First Gen Compact AI Accelerator Device

Tenstorrent unveiled its first-generation compact AI accelerator device designed in partnership with Razer™ today at CES 2026 ...
Design And Reuse

Marvell to Acquire XConn Technologies, Expanding Leadership in AI Data Center Connectivity

Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, today announced it has entered into a definitive agreement to acquire XConn Technologies (“XConn”), a ...
Design And Reuse

Keysight Launches Software Solution to Ensure Trustworthy AI Deployment in Safety-Critical Environments

With AI Software Integrity Builder, Keysight empowers engineering teams to move from fragmented testing to a unified AI assurance strategy, enabling them to deploy AI systems that are not only ...